[sac-user] with-loop parallelization

Clemens Grelck c.grelck at uva.nl
Tue Jan 11 15:40:10 CET 2011

Juhasz David wrote:
> Hi Clemens,
> Clemens Grelck wrote:
> [...]
>> So far, all real world examples and benchmarks we have come across so far
>> did not question the design to only parallelise a single level of with-loops.
>> It boils down to the qestion whether the outermost with-loop provides
>> sufficient concurrency wrt the target architecture. If you provide with
>> some realistic example where this is not the case I'm happy to look into
>> this. Of course, it is easy to construct examples that fool the SAC
>> compiler, but are these really representative of production code? That
>> is my point.
> I see your point. The question was only theoretical, so I don't know any 
> real world problem to this issue. But I will think about it. ;)

Just to express myself more clearly: if you can come across such a code
I would be very interested to study it and identify potential consequences
for SAC code generation.

>> Also take into account the following: Any more flexible parallelisation
>> scheme (which I personally would love to see materialise) must not
>> create more overhead in the simple bread-and-butter examples of
>> parallelisation.
> This is absolutely right. The general purpose parallelisation must not be 
> less efficient. That's why I suggested to keep the current parallelisation 
> and give hints for special cases, when the programmer is really sure about 
> what he/she does.

That hint of ignoring some outer with-loop wrt parallelisation is
indeed a nice idea that could be realised without affecting code
generation otherwise.


Dr Clemens Grelck                                     Science Park 904
Universitair Docent                                  1098 XH Amsterdam
Universiteit van Amsterdam
Instituut voor Informatica                       T +31 (0) 20 525 8683
                                                  F +31 (0) 20 525 7490
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